Competitive Exams : Computer Awareness - Architecture (Set 3) | Concept of Maths

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Competitive Exams : Computer Awareness - Architecture (Set 3) | Concept of Maths

Competitive Exams : Computer Awareness - Architecture (Set 3)

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Computer Awareness

Question No. 1

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Which of the following architectural advancements is primarily responsible for enabling a CPU to execute multiple instructions simultaneously without waiting for one to complete before fetching the next, leading to increased Instruction Per Cycle (IPC)?

Increased clock speed

Larger cache memory

Pipelining

Wider data bus

Higher transistor density

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SECTION : Computer Awareness